Title
An Efficient Implementation of HighSpeed JPEG2000 Encoder/Decoder: ALGORITHMS, SPECIFICATIONS, DESIGN SPACE EXPLORATION,Used
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This book presents a complete and uptodate description of an efficient FPGA implementation of highspeed JPEG2000 using formal design methodologies namely SpecC and A3, in a systematic and clear manner. JPEG2000 proposes a large set of advanced features for today's internet and multimedia applications. At the heart of JPEG2000 are two complex DSP algorithms: Discrete Wavelet Transform (DWT) and Embedded Block Coding with Optmized Truncation (EBCOT). Both algorithms are complex, compute intensive and very difficult to optimize in software implementation for realtime imaging and multimedia applications. A hardware implementation brings a solution to this complexity for realtime applications. This book proposes flexible and efficient architectures for DWT, matching arithmetic coder (MQ coder) and EBCOT units of the JPEG2000 system. The implemented parallel structure increases throughput off the Tier1 (EBCOT and MQC) and DWT by factors of 301 and 164 cycles respectively. Execution results from software only and FPGA implemented JPEG2000 is compared and analyzed.
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