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A reliable method for testing embedded memories within Virtex4 and Virtex5 FieldProgrammable Gate Arrays (FPGAs) is needed by the current FPGA community. A method for testing the Virtex4 embedded Block Random Access Memories (RAMs) using builtIn SelfTest(BIST) was initially proposed by Daniel Milton in BuiltIn SelfTest of Configurable Memory Resources in FieldProgrammable GateArrays. However, this method was found to have deficiencies in practical application. Several corrections and improvements are made to this proposed approach, which improves overall BIST generation and execution time. A method for testing the Virtex5 FPGA Block RAMs is proposed and the suggested configuration settings are described. Four Test Pattern Generators (TPGs) are proposed to implement the BIST, which will consist of 16 configuration bit files.
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