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Efficient and Scalable Cache Coherence for Chip Multiprocessors: Novel proposals for managing cache coherence in future manycor,Used
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Chip multiprocessors (CMPs) constitute the new trend for increasing the performance of future computers. In the near future, chips with tens of cores will become more popular. Nowadays, directorybased protocols constitute the best alternative to keep cache coherence in largescale systems. Nevertheless, directorybased protocols have two important issues that prevent them from achieving better scalability: the directory memory overhead and the long cache miss latencies. This book focuses on these key issues. The first proposal is a scalable distributed directory organization that copes with the memory overhead of directorybased protocols. The second proposal presents the direct coherence protocols, which are aimed at avoiding the indirection problem of traditional directorybased protocols and, therefore, they improve applications' performance. Finally, a novel mapping policy for distributed caches is presented. This policy reduces the long access latency while lessening the number of offchip accesses, leading to improvements in applications' execution time.
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