On Optimal Interconnections for VLSI (The Springer International Series in Engineering and Computer Science, 301),Used

On Optimal Interconnections for VLSI (The Springer International Series in Engineering and Computer Science, 301),Used

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On Optimal Interconnections for VLSI describes, from a geometric perspective, algorithms for highperformance, highdensity interconnections during the global and detailed routing phases of circuit layout. First, the book addresses area minimization, with a focus on nearoptimal approximation algorithms for minimumcost Steiner routing. In addition to practical implementations of recent methods, the implications of recent results on spanning tree degree bounds and the method of Zelikovsky are discussed. Second, the book addresses delay minimization, starting with a discussion of accurate, yet algorithmically tractable, delay models. Recent minimumdelay constructions are highlighted, including provably good costradius tradeoffs, criticalsink routing algorithms, Elmore delayoptimal routing, graph Steiner arborescences, nontree routing, and wiresizing. Third, the book addresses skew minimization for clock routing and prescribeddelay routing formulations. The discussion starts with early matchingbased constructions and goes on to treat zeroskew routing with provably minimum wirelength, as well as planar clock routing. Finally, the book concludes with a discussion of multiple (competing) objectives, i.e., how to optimize area, delay, skew, and other objectives simultaneously. These techniques are useful when the routing instance has heterogeneous resources or is highly congested, as in FPGA routing, multichip packaging, and very dense layouts.Throughout the book, the emphasis is on practical algorithms and a complete selfcontained development. On Optimal Interconnections for VLSI will be of use to both circuit designers (CAD tool users) as well as researchers and developers in the area of performancedriven physical design.

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For more information, please visit www.P65Warnings.ca.gov.

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