SystemonaChip Verification: Methodology and Techniques,Used

SystemonaChip Verification: Methodology and Techniques,Used

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SKU: SONG0792372794
Brand: Springer
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SystemOnaChip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Coverification, Static netlist verification, Physical verification, and Design signoff in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application.SystemOnaChip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter: Explanation of the objective involved in performing verification after a given design step; Features of options available; When to use a particular option; How to select an option; and Limitations of the option. This exciting new book will be of interest to all designers and test professionals.

⚠️ WARNING (California Proposition 65):

This product may contain chemicals known to the State of California to cause cancer, birth defects, or other reproductive harm.

For more information, please visit www.P65Warnings.ca.gov.

  • Q: What is the main focus of 'System-on-a-Chip Verification: Methodology and Techniques'? A: The book primarily focuses on providing comprehensive methodologies and strategies for System-on-a-Chip (SOC) verification, covering aspects from system-level verification to design sign-off.
  • Q: Who is the author of this book? A: The author of 'System-on-a-Chip Verification: Methodology and Techniques' is Prakash Rashinkar.
  • Q: What topics are covered in the book? A: The book covers topics such as introduction to SOC design and verification, system-level verification, block-level verification, analog/mixed signal simulation, HW/SW co-verification, static netlist verification, physical verification, and design sign-off.
  • Q: Is this book suitable for beginners in SOC verification? A: Yes, the book is designed to cater to both professionals and newcomers in the field of SOC verification, offering systematic explanations of verification strategies.
  • Q: What is the binding type of this book? A: The book is available in hardcover binding.
  • Q: How many pages does 'System-on-a-Chip Verification: Methodology and Techniques' have? A: The book contains 392 pages.
  • Q: When was this book published? A: It was published on December 31, 2000.
  • Q: What condition is the book in? A: The item is listed as 'New'.
  • Q: Does the book provide practical examples for verification strategies? A: Yes, it illustrates verification aspects with a single reference design for a Bluetooth application, making it practical and relatable.
  • Q: What edition is 'System-on-a-Chip Verification: Methodology and Techniques'? A: This is the 2002 edition of the book.

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